Preventing shorting of adjacent devices
US8586455B1 · kind B1 · utility
21Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2012 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | May 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a method of preventing electrical shorting of adjacent semiconductor devices. The method includes forming a plurality of fins of a plurality of field-effect-transistors on a substrate; forming at least one barrier structure between a first and a second fin of the plurality of fins; and growing an epitaxial film from the plurality of fins, the epitaxial film extending horizontally from sidewalls of at least the first and second fins and reaching the barrier structure situating between the first and second fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.