Stacked semiconductor chips having circuit element provided with each of the semiconductor chips
US8587117B2 · kind B2 · utility
2Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2012 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | May 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06544
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked device includes a plurality of semiconductor chips connected to each other by through electrodes. The same number of through electrodes are included in each of paths extending from a first power source terminal through each of circuit elements formed for the semiconductor chips to a second power source terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.