Reducing source loading effect in spin torque transfer magnetoresisitive random access memory (STT-MRAM)
US8587993B2 · kind B2 · utility
13Cited by
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22Claims
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Key dates
| Filing date | Mar 2, 2009 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Apr 10, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods to reduce source loading effects in STT-MRAM are disclosed. In a particular embodiment, a method includes determining a switching current ratio of a magnetic tunnel junction (MTJ) structure that enables stable operation of a memory cell. The memory cell includes the MTJ structure serially coupled to an access transistor. The method also includes modifying an offset magnetic field that is incident to a free layer of the MTJ structure. The modified offset magnetic field causes the MTJ structure to exhibit the switching current ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.