Method and apparatus for implementing soft constraints in tools used for designing programmable logic devices
US8589849B1 · kind B1 · utility
4Cited by
12References
30Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 24, 2007 |
| Grant date | Nov 19, 2013 |
| Priority date | — |
| Expiry date | Apr 14, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing a system on a target device utilizing programmable logic devices (PLDs) includes generating options for utilizing resources on the PLDs in response to user specified constraints. The options for utilizing the resources on the PLDs are refined independent of the user specified constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.