Semiconductor package, core layer material, buildup layer material, and sealing resin composition
US8592994B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2007 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Jul 26, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip-chip semiconductor package includes a circuit board having a core layer and at least one buildup layer, a semiconductor device connected to the circuit board through a metal bump, and a cured member that is made of a sealing resin composition and enclosed between the semiconductor device and the circuit board. The coefficient of linear expansion at 25 to 75° C. of the cured member is 15 to 35 ppm/° C., the glass transition temperature of at least one buildup layer is 170° C. or more, and the coefficient of linear expansion of at 25 to 75° C. of the at least one buildup layer in the planar direction is 25 ppm or less. A highly reliable flip-chip semiconductor package, buildup layer material, core layer material, and sealing resin composition can be provided by preventing cracks and inhibiting delamination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.