Micro-threaded memory
US8595459B2 · kind B2 · utility
20Cited by
151References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2004 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Nov 29, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.