Patent · US Active

Deep silicon via for grounding of circuits and devices, emitter ballasting and isolation

US8598713B2 · kind B2 · utility

4Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 20, 2010
Grant dateDec 3, 2013
Priority date
Expiry dateFeb 3, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

According to an exemplary embodiment, a semiconductor die including at least one deep silicon via is provided. The deep silicon via comprises a deep silicon via opening that extends through at least one pre-metal dielectric layer of the semiconductor die, at least one epitaxial layer of the semiconductor die, and partially into a conductive substrate of the semiconductor die. The deep silicon via further comprises a conductive plug situated in the deep silicon via opening and forming an electrical contact with the conductive substrate. The deep silicon via may include a sidewall dielectric layer and a bottom conductive layer. A method for making a deep silicon via is also disclosed. The deep silicon via is used to, for example, provide a ground connection for power transistors in the semiconductor die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.