Apparatus and method for generating VLIW, and processor and method for processing VLIW
US8601244B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 2010 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | May 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for generating a very long instruction word (VLIW) command that supports predicated execution, and a VLIW processor and method for processing a VLIW are provided herein. The VLIW command includes an instruction bundle formed of a plurality of instructions to be executed in parallel and a single value indicating predicated execution, and is generated using the apparatus and method for generating a VLIW command. The VLIW processor decodes the instruction bundle and executes the instructions, which are included in the decoded instruction bundle, in parallel, according to the value indicating predicated execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.