Patent · US Active

Intelligent power controller

US8601288B2 · kind B2 · utility

34Cited by
14References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 31, 2010
Grant dateDec 3, 2013
Priority date
Expiry dateJun 3, 2031

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method, apparatus, and system in which an interconnect for an integrated circuit communicates transactions between one or more initiator Intellectual Property (IP) cores and one or more target IP cores coupled to the interconnect, including a power manager having a hierarchy of two or more layers including a hardware logic portion to control a power consumption of two or more domains in the integrated circuit, where each layer of the power manager performs its own function; wherein the power manager has its own dedicated CPU or dedicated state machine to execute power management instructions; and wherein the power manager controls the power consumption of two or more domains without using a CPU IP core utilized by other IP cores on the integrated circuit to execute power management instructions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.