Inventor · Berkeley, CA, US

Benoit de LESCURE

33Patents
6h-index
15Co-inventors
62Inventor score

Filing activity: Aug 31, 2010 → Jul 15, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8601288B2 Intelligent power controller Emerging Cross-Sectional Technologies 34 Active
US11121933B2 Physically aware topology synthesis of a network Physics 19 Active
US10990724B1 System and method for incremental topology synthesis of a network-on-chip Physics 18 Active
US8438306B2 Apparatus and methods for on layer concurrency in an integrated circuit Physics 17 Active
US9940423B2 Editing a NoC topology on top of a floorplan Physics 16 Active
US11449655B2 Synthesis of a network-on-chip (NoC) using performance constraints and objectives Physics 13 Active
US10902166B2 System and method for isolating faults in a resilient system Electricity 3 Active
US10452499B2 Redundancy for cache coherence systems Physics 1 Active
US11836427B2 Constraints and objectives used in synthesis of a network-on-chip (NoC) Physics 1 Active
US11601357B2 System and method for generation of quality metrics for optimization tasks in topology synthesis of a network Physics 1 Active
US10025677B2 Redundancy for cache coherence systems Physics 1 Active
US10268794B2 Editing a NoC topology on top of a floorplan Physics 1 Active
US11657203B2 Multi-phase topology synthesis of a network-on-chip (NoC) Physics 1 Active
US11665776B2 System and method for synthesis of a network-on-chip for deadlock-free transformation Physics 1 Active
US11436185B2 System and method for transaction broadcast in a network on chip Physics 0 Active
US12348382B2 Incremental topology modification of a network-on-chip Physics 0 Active
US11558259B2 System and method for generating and using physical roadmaps in network synthesis Physics 0 Active
US12380055B2 System and method for performing transaction aggregation in a network-on-chip (NoC) Electricity 0 Active
US11784909B2 Quality metrics for optimization tasks in generation of a network Physics 0 Active
US11294757B2 System and method for advanced detection of failures in a network-on-chip Physics 0 Active
US11368402B1 System and method for using soft lock with virtual channels in a network-on-chip (NoC) Electricity 0 Active
US11416352B2 System and method for logic functional redundancy Physics 0 Active
US12038866B2 Broadcast adapters in a network-on-chip Physics 0 Active
US12135928B2 Constraints and objectives used in synthesis of a network-on-chip (NoC) Physics 0 Active
US11748535B2 System and method to generate a network-on-chip (NoC) description using incremental topology synthesis Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.