Heterojunction field-effect transistor with field plate connected to gate or source electrode

US8604516B2 · kind B2 · utility

Assignee

• PANASONIC HOLDINGS CORPORATION · JP

Inventors

• Naohide Wakita · Kobe, JP
• Kenichiro Tanaka · Menlo Park, US
• Masahiro Ishida · Tokyo, JP
• Satoshi Tamura · Osaka, JP
• Daisuke Shibata · Toyota, JP

Key dates

• Filing date: Dec 27, 2012
• Grant date: Dec 10, 2013
• Expiry date: Dec 27, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/111

Abstract

A first group III nitride semiconductor layer has a low carbon concentration region having a carbon concentration of less than 1×1017 cm−3, and located in a region under an edge of a gate electrode closer to a drain electrode, a thickness d2 of the low carbon concentration region satisfiesVm/(110·d1)≦d2<Vm/(110·d1)+0.5