Semiconductor memory device
US8604573B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | Apr 20, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
Abstract
According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on a semiconductor substrate, the first magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; a non-magnetic layer formed on the first magnetic layer; a second magnetic layer formed on the non-magnetic layer, the second magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; and a sidewall film provided so as to cover a sidewall of each of the magneto-resistance elements with a protective film interposed therebetween, the sidewall film providing a tensile stress to the magneto-resistance element along the easy axis of magnetization.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.