Integrated circuit chip with repeater flops and methods for automated design of same
US8607178B2 · kind B2 · utility
2Cited by
3References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 30, 2012 |
| Grant date | Dec 10, 2013 |
| Priority date | — |
| Expiry date | May 6, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) chip having repeaters for propagating signals along relatively long wires that extend between and among lower-level physical blocks of the IC chip, wherein the repeaters are implemented as clocked flip-flops (or “repeater flops”). A method for automatically inserting and allocating such repeater flops during the logical and physical design of the IC chip is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.