System and method for communicating on an electrical bus
US8612657B2 · kind B2 · utility
5Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2008 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Jul 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/40273
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for communicating on an electrical bus by generating a master logical signal on the electrical bus in the form of a pulse-width modulation signal. Generating a slave logical signal on the electrical bus in the form of a current signal. Reading the slave logical signal by sampling the magnitude of the current signal on the electrical bus, wherein magnitude of the current on the electrical bus is sampled at a point in the bit time when the voltage on the electrical bus has remained constant for a period longer than the shortest time that the voltage remains at any level during the bit time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.