Method and apparatus for enhanced error correction
US8612822B1 · kind B1 · utility
1Cited by
5References
20Claims
0Family size
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Key dates
| Filing date | Jan 6, 2011 |
| Grant date | Dec 17, 2013 |
| Priority date | — |
| Expiry date | Nov 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1515
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A data unit is received, wherein the data unit includes a primary information data structure and a primary redundancy data structure. A field in the primary information data structure is detected. A secondary error correction operation is performed on the detected field. After performing the secondary error correction operation, a primary error correction operation is performed on the data unit using the primary redundancy data structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.