Erez Amit
11Patents
2h-index
15Co-inventors
43Inventor score
Filing activity: Aug 5, 2010 → May 3, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8588242B1 | Deficit round robin scheduling using multiplication factors | Electricity | 13 | Active |
| US8417982B1 | Dual clock first-in first-out (FIFO) memory system | Physics | 6 | Active |
| US8522116B2 | Systems and methods for performing forward error correction | Electricity | 2 | Active |
| US9338530B2 | Versatile optical network interface methods and systems | Electricity | 2 | Active |
| US8612822B1 | Method and apparatus for enhanced error correction | Electricity | 1 | Active |
| US9521011B2 | Interconnected ring network in a multi-processor system | Electricity | 0 | Active |
| US9454480B2 | Interconnected ring network in a multi-processor system | Electricity | 0 | Active |
| US11269799B2 | Cluster of processing elements having split mode and lock mode | Physics | 0 | Active |
| US10230542B2 | Interconnected ring network in a multi-processor system | Electricity | 0 | Active |
| US8924810B1 | Method and apparatus for enhanced error correction | Electricity | 0 | Active |
| US8693868B2 | Versatile optical network interface methods and systems | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.