SONOS ONO stack scaling

US8614124B2 · kind B2 · utility

Assignee

• Cypress Semiconductor Corporation · US

Inventors

• Fredrick B. Jenne · Tracy, US
• Sagy Levy · Jerusalem, IL

Key dates

• Filing date: Sep 26, 2007
• Grant date: Dec 24, 2013
• Expiry date: Jun 2, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02271
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Scaling a nonvolatile trapped-charge memory device and the article made thereby. In an embodiment, scaling includes multiple oxidation and nitridation operations to provide a tunneling layer with a dielectric constant higher than that of a pure silicon dioxide tunneling layer but with a fewer hydrogen and nitrogen traps than a tunneling layer having nitrogen at the substrate interface. In an embodiment, scaling includes forming a charge trapping layer with a non-homogenous oxynitride stoichiometry. In one embodiment the charge trapping layer includes a silicon-rich, oxygen-rich layer and a silicon-rich, oxygen-lean oxynitride layer on the silicon-rich, oxygen-rich layer. In an embodiment, the method for scaling includes a dilute wet oxidation to density a deposited blocking oxide and to oxidize a portion of the silicon-rich, oxygen-lean oxynitride layer.