Sagy Levy
76Patents
20h-index
34Co-inventors
88Inventor score
Filing activity: Sep 28, 1998 → Sep 26, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6451713B1 | UV pretreatment process for ultra-thin oxynitride formation | Electricity | 467 | Expired |
| US8093128B2 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Electricity | 84 | Active |
| US8063434B1 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Physics | 75 | Active |
| US6638876B2 | Method of forming dielectric films | Electricity | 71 | Expired |
| US6884719B2 | Method for depositing a coating having a relatively high dielectric constant onto a substrate | Electricity | 70 | Expired |
| US8318608B2 | Method of fabricating a nonvolatile charge trap memory device | Electricity | 45 | Active |
| US6191011A | Selective hemispherical grain silicon deposition | Electricity | 39 | Expired |
| US8163660B2 | SONOS type stacks for nonvolatile change trap memory devices and methods to form the same | Electricity | 38 | Active |
| US8067284B1 | Oxynitride bilayer formed using a precursor inducing a high charge trap density in a top layer of the bilayer | Electricity | 35 | Active |
| US7670963B2 | Single-wafer process for fabricating a nonvolatile charge trap memory device | Emerging Cross-Sectional Technologies | 34 | Active |
| US8679927B2 | Integration of non-volatile charge trap memory devices and logic CMOS devices | Electricity | 32 | Active |
| US8860122B1 | Nonvolatile charge trap memory device having a high dielectric constant blocking region | Electricity | 32 | Active |
| US8940645B2 | Radical oxidation process for fabricating a nonvolatile charge trap memory device | Electricity | 31 | Active |
| US8643124B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 25 | Active |
| US9093318B2 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Electricity | 24 | Active |
| US9449831B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 22 | Active |
| US9355849B1 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 21 | Active |
| US8633537B2 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Electricity | 21 | Active |
| US8614124B2 | SONOS ONO stack scaling | Electricity | 21 | Active |
| US8993453B1 | Method of fabricating a nonvolatile charge trap memory device | Electricity | 20 | Active |
| US9306025B2 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Physics | 20 | Active |
| US9349824B2 | Oxide-nitride-oxide stack having multiple oxynitride layers | Electricity | 20 | Active |
| US8859374B1 | Memory transistor with multiple charge storing layers and a high work function gate electrode | Physics | 19 | Active |
| US7799670B2 | Plasma oxidation of a memory layer to form a blocking layer in non-volatile charge trap memory devices | Electricity | 19 | Active |
| US9502543B1 | Method of manufacturing for memory transistor with multiple charge storing layers and a high work function gate electrode | Electricity | 18 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.