Simultaneous multi-corner static timing analysis using samples-based static timing infrastructure
US8615727B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2010 |
| Grant date | Dec 24, 2013 |
| Priority date | — |
| Expiry date | Dec 16, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of performing simultaneous multi-corner static timing analysis (STA) on a design for an integrated circuit is provided. This method can include reading design data including a netlist, parasitics, and libraries at a plurality of corners. Each corner can represent a set of process, temperature, and voltage conditions. Using the design data as inputs, a plurality of operations can be performed to generate timing reports regarding the design at the plurality of corners. Notably, each operation has a single control flow and uses vectors of samples for performing the plurality of operations. Each sample is a value associated with a corner. This method minimizes computational resource and memory usage as well as accelerates the turn around time of multi-corner analysis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.