High-speed graphene transistor and method of fabrication by patternable hard mask materials
US8617941B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2011 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Oct 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Graphene or carbon nanotube-based transistor devices and techniques for the fabrication thereof are provided. In one aspect, a transistor is provided. The transistor includes a substrate; a carbon-based material on the substrate, wherein a portion of the carbon-based material serves as a channel region of the transistor and other portions of the carbon-based material serve as source and drain regions of the transistor; a patterned organic buffer layer over the portion of the carbon-based material that serves as the channel region of the transistor; a conformal high-k gate dielectric layer disposed selectively on the patterned organic buffer layer; metal source and drain contacts formed on the portions of the carbon-based material that serve as the source and drain regions of the transistor; and a metal top-gate contact formed on the high-k gate dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.