Method of forming a capacitor and method of manufacturing a semiconductor device using the same
US8617950B2 · kind B2 · utility
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3References
20Claims
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Key dates
| Filing date | Apr 3, 2012 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Apr 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
A capacitor is fabricated by forming a mold layer of a silicon based material that is not an oxide of silicon, e.g., polysilicon or doped polysilicon, on a substrate, forming an opening through the mold layer, forming a barrier layer pattern along the sides of the opening, subsequently forming a lower electrode in the opening, then removing the mold layer and the barrier layer pattern, and finally sequentially forming dielectric layer and an upper electrode on the lower electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.