Junction gate field effect transistor structure having n-channel
US8618583B2 · kind B2 · utility
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8References
20Claims
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Key dates
| Filing date | May 16, 2011 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Nov 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/357
Abstract
The disclosure relates generally to junction gate field effect transistor (JFET) structures and methods of forming the same. The JFET structure includes a p-type substrate having a p-region therein; an n-channel thereunder; and n-doped enhancement regions within the n-channel, each n-doped enhancement region separated from the p-region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.