Integrated circuit with error repair and fault tolerance
US8621272B2 · kind B2 · utility
7Cited by
4References
43Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2008 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | May 8, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1608
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is provided with error detection circuitry and error repair circuitry. Error tolerance circuitry is responsive to a control parameter to selectively disable the error repair circuitry. The control parameter is dependent on the processing performed within the circuit. For example, the control parameter may be generated in dependence upon the program instruction being executed, the output signal value which is in error, the previous behavior of the circuit or in other ways.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.