Patent · US Active

Error correction in a set associative storage device

US8621336B2 · kind B2 · utility

1Cited by
3References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 1, 2008
Grant dateDec 31, 2013
Priority date
Expiry dateSep 9, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1064
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A data processing apparatus is provided comprising processing circuitry for performing data processing operations, a set associative storage device for storing data values for access by the processing circuitry when performing data processing operations, error detection circuitry for performing, for each access to the storage device, an error detection operation on the data value accessed, and maintenance circuitry associated with the storage device for performing one or more maintenance operations. The processing circuitry is arranged to issue an error detection maintenance request to the maintenance circuitry specifying at least one specific physical location within the storage device, and the maintenance circuitry is responsive to the error detection maintenance request to perform at least one dummy access to the at least one specific physical location within the storage device and to provide the processing circuitry with error status information derived from the error detection operation performed by the error detection circuitry in respect of said at least one dummy access.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.