Semiconductor memory device and method of operation the same
US8625376B2 · kind B2 · utility
409Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2011 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Jan 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a first plane and a second plane each configured to include a plurality of memory cells, and a data transfer circuit configured to transfer first data, stored in the memory cells of the first plane, to the second plane and transfer second data, stored in the memory cells of the second plane, to the first plane when a copyback operation is performed and to transfer the first data or the second data to an I/O circuit when a read operation is performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.