Method and apparatus for dynamically configurable multi level error correction
US8627169B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 20, 2008 |
| Grant date | Jan 7, 2014 |
| Priority date | — |
| Expiry date | Jul 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/152
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An invention is provided for dynamically configurable error correction. The invention includes receiving a check code configuration signal, which indicates a particular level of error detection. A check code generator is configured to generate check codes based on the particular level of error detection indicated by the check code configuration signal. In addition, an error locator configuration signal is received that indicates a particular level of error addressing, and an error locator is configured to produce addresses of errors in a set of data based on the particular level of error addressing indicated by the error locator configuration signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.