Via structure and method thereof
US8630033B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2011 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Jun 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.