Dynamic QoS upgrading
US8631213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2010 |
| Grant date | Jan 14, 2014 |
| Priority date | — |
| Expiry date | Nov 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a memory controller includes multiple ports. Each port may be dedicated to a different type of traffic. In an embodiment, quality of service (QoS) parameters may be defined for the traffic types, and different traffic types may have different QoS parameter definitions. The memory controller may be configured to schedule operations received on the different ports based on the QoS parameters. In an embodiment, the memory controller may support upgrade of the QoS parameters when subsequent operations are received that have higher QoS parameters, via sideband request, and/or via aging of operations. In an embodiment, the memory controller is configured to reduce emphasis on QoS parameters and increase emphasis on memory bandwidth optimization as operations flow through the memory controller pipeline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.