Patent · US Active

Apparatus and method for determination of a position of a 1 bit error in a coded bit sequence, apparatus and method for correction of a 1-bit error in a coded bit sequence and decoder and method for decoding an incorrect, coded bit sequence

US8631308B2 · kind B2 · utility

2Cited by
0References
30Claims
0Family size

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Inventors

Key dates

Filing dateSep 29, 2011
Grant dateJan 14, 2014
Priority date
Expiry dateJan 30, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/19
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An apparatus for determination of a position of a 1-bit error includes an error position determiner of the inner code, an error syndrome determiner of the outer code, a derivative determiner and an overall error position determiner. The error position determiner of the inner code determines at least one possible error position of a bit error in the coded bit sequence on the basis of the inner code. The error syndrome determiner of the outer code determines a value of a non-linear syndrome bit of the outer code on the basis of a non-linear function of bits in the coded bit sequence. Furthermore, the derivative determiner determines a value of a derivative bit for at least one determined, possible error position of the bit error on the basis of derivation of the non-linear function based on the bit at the determined, possible error position in the coded bit sequence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.