Lightly doped source/drain last method for dual-epi integration
US8633070B2 · kind B2 · utility
2Cited by
9References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2010 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Jan 15, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device and method for fabricating the integrated circuit device is disclosed. The method involves providing a substrate; forming a gate structure over the substrate; forming an epitaxial layer in a source and drain region of the substrate that is interposed by the gate structure; and after forming the epitaxial layer, forming a lightly doped source and drain (LDD) feature in the source and drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.