Source/drain stack stressor for semiconductor device

US8633516B1 · kind B1 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Zhiqiang Wu · Plano, US
• Gwan Sin Chang · Hsinchu, TW
• Kuo-Cheng Ching · Hsinchu, TW
• Chun Chung Su · New Taipei, TW
• Shi Ning Ju · Hsinchu, TW

Key dates

• Filing date: Sep 28, 2012
• Grant date: Jan 21, 2014
• Expiry date: Sep 28, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62

Abstract

The present disclosure provides a semiconductor device. The device includes a substrate, a fin structure formed by a first semiconductor material, a gate region on a portion of the fin, a source region and a drain region separated by the gate region on the substrate and a source/drain stack on the source and drain region. A low portion of the source/drain stack is formed by a second semiconductor material and it contacts a low portion of the fin in the gate region. An upper portion of the source/drain stack is formed by a third semiconductor material and it contacts an upper portion of the fin in the gate region.