Transistor channel mobility using alternate gate dielectric materials
US8633534B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Dec 22, 2010 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Dec 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
An apparatus comprises a substrate, a phonon-decoupling layer formed on the substrate, a gate dielectric layer formed on the phonon-decoupling layer, a gate electrode formed on the gate dielectric layer, a pair of spacers formed on opposite sides of the gate electrode, a source region formed in the substrate subjacent to the phonon-decoupling layer, and a drain region formed in the substrate subjacent to the phonon-decoupling layer. The phonon-decoupling layer prevents the formation of a silicon dioxide interfacial layer and reduces coupling between high-k phonons and the field in the substrate.
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