Resistive memory device having voltage level equalizer
US8634227B2 · kind B2 · utility
6Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2011 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Feb 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/71
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor resistive memory device. The resistive memory device includes a plurality of unit cells. A source line and a data input/output line of the unit cells may be selectively connected to have a substantially same voltage level for equalization when the unit cells are in inactive or unselected state. The equalization may decrease current consumption and protect write error, and protect leakage current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.