Flash memory having multi-level architecture
US8634242B2 · kind B2 · utility
12Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2012 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Subject matter disclosed herein relates to a multi-level flash memory and a process flow to form same.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.