Data processing system having a sequence processing unit and method of operation
US8635497B2 · kind B2 · utility
4Cited by
18References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2011 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | Mar 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes one or more processors; one or more trace debug circuits configured to monitor one or more of instruction, data, and watchpoint buses of the one or more processors, and record information determined from said monitoring; and a sequence processing unit configured to provide a control signal to a trace debug circuit of the one or more trace debug circuits, wherein in response to the control signal, the trace debug circuit controls one or more of said monitoring and recording, and a system on a chip comprises the one or more processors, the one or more trace debug circuits, and the sequence processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.