Asymmetric hetero-structure FET and method of manufacture

US8637871B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Brent A. Anderson · Jericho, US
• Jeffrey B. Johnson · Hague, US
• Edward J. Nowak · South Burlington, US
• Robert R. Robison · Colchester, US

Key dates

• Filing date: Nov 4, 2010
• Grant date: Jan 28, 2014
• Expiry date: Mar 4, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/693

Abstract

An asymmetric hetero-structure FET and method of manufacture is provided. The structure includes a semiconductor substrate and an epitaxially grown semiconductor layer on the semiconductor substrate. The epitaxially grown semiconductor layer includes an alloy having a band structure and thickness that confines inversion carriers in a channel region, and a thicker portion extending deeper into the semiconductor structure at a doped edge to avoid confinement of the inversion carriers at the doped edge.