Store-to-load forwarding mechanism for processor runahead mode operation
US8639886B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2009 |
| Grant date | Jan 28, 2014 |
| Priority date | — |
| Expiry date | Aug 23, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method to optimize runahead operation for a processor without use of a separate explicit runahead cache structure. Rather than simply dropping store instructions in a processor runahead mode, store instructions write their results in an existing processor store queue, although store instructions are not allowed to update processor caches and system memory. Use of the store queue during runahead mode to hold store instruction results allows more recent runahead load instructions to search retired store queue entries in the store queue for matching addresses to utilize data from the retired, but still searchable, store instructions. Retired store instructions could be either runahead store instructions retired, or retired store instructions that executed before entering runahead mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.