Three-dimensional semiconductor memory device
US8643080B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2011 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Oct 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
Provided are three-dimensional semiconductor devices. The devices may include gap-fill insulating patterns configured to upwardly extend from a substrate and an electrode structure defined by sidewalls of the gap-fill insulating patterns. Vertical structures may be provided between adjacent ones of the gap-fill insulating patterns to penetrate the electrode structure, and the vertical structures may include first and second rows of the vertical structures. A separation pattern may be provided between the first and second rows of vertical structures and include a separation semiconductor layer. The separation pattern extends along a direction parallel to the first and second rows of vertical structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.