Method and system for securely protecting a semiconductor chip without compromising test and debug capabilities
US8644499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2009 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Dec 25, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip may be operable to block the debug interfaces when the semiconductor chip boots up from the boot read-only memory (ROM). The semiconductor chip may be operable to authenticate a debug certificate received by the semiconductor chip and enable one or more debug interfaces in the semiconductor chip based on the information resulting from the authentication of the debug certificate. The debug certificate may be in a form of a cryptographic public key certificate. A unique device ID which may be generated at boot and stored in the memory may be used by the semiconductor chip to authenticate the debug certificate. The device ID may be generated using the cryptographic public key that is stored in the one-time programmable (OTP) memory in the semiconductor chip and a cryptographic hash algorithm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.