Love Kothari
21Patents
6h-index
22Co-inventors
65Inventor score
Filing activity: Oct 28, 2008 → Sep 2, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9592742B1 | Systems, apparatus, and methods of charging electric vehicles | Emerging Cross-Sectional Technologies | 53 | Active |
| US10399461B1 | Methods for electric power | Emerging Cross-Sectional Technologies | 18 | Active |
| US8826039B2 | Apparatus and method for providing hardware security | Electricity | 12 | Active |
| US8918575B2 | Method and system for securely programming OTP memory | Physics | 9 | Active |
| US9355280B2 | Apparatus and method for providing hardware security | Electricity | 6 | Active |
| US8782314B2 | Scalable and configurable system on a chip interrupt controller | Electricity | 6 | Active |
| US10369890B1 | Systems, apparatus, and methods for electric power | Emerging Cross-Sectional Technologies | 5 | Active |
| US8954017B2 | Clock signal multiplication to reduce noise coupled onto a transmission communication signal of a communications device | Electricity | 4 | Active |
| US8744368B2 | Integrated circuit with an adaptable contact pad reconfiguring architecture | Electricity | 4 | Active |
| US8074132B2 | Protecting data on integrated circuit | Physics | 3 | Active |
| US8745724B2 | Methods of on-chip memory partitioning and secure access violation checking in a system-on-chip | Electricity | 3 | Active |
| US9225343B2 | Electronics device capable of efficient communication between components with asyncronous clocks | Electricity | 2 | Active |
| US9407272B2 | Systems and methods for distributing an aging burden among processor cores | Electricity | 2 | Active |
| US8644499B2 | Method and system for securely protecting a semiconductor chip without compromising test and debug capabilities | Physics | 2 | Active |
| US11511635B2 | Electric power system | Emerging Cross-Sectional Technologies | 2 | Active |
| US8996736B2 | Clock domain crossing serial interface, direct latching, and response codes | Emerging Cross-Sectional Technologies | 1 | Active |
| US8856559B2 | Integrated circuit allowing to test a power management unit based on or more conditions and configuring the plurality of pins to operate in normal and test mode | Electricity | 1 | Active |
| US9448878B2 | Clock domain crossing serial interface | Emerging Cross-Sectional Technologies | 0 | Active |
| US8650633B2 | Integrated circuit for preventing chip swapping and/or device cloning in a host device | Electricity | 0 | Active |
| US8732806B2 | Method and system for hardware enforced virtualization in an integrated circuit | Physics | 0 | Active |
| US8745411B2 | Protecting external volatile memories using low latency encryption/decryption | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.