Circuit and electronic module for automatic addressing
US8645580B2 · kind B2 · utility
8Cited by
5References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 6, 2011 |
| Grant date | Feb 4, 2014 |
| Priority date | — |
| Expiry date | Apr 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a first configuration terminal, a second configuration terminal, a bus terminal, and an auto addressing circuit coupled to the first and second configuration terminals. The auto addressing circuit is responsive to a data pattern received at the first configuration terminal to assign a node address to an operational circuit, and subsequently to couple the first configuration terminal to the second configuration terminal. The integrated circuit is subsequently responsive to the node address when the node address is received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.