Method and apparatus for supporting memory usage throttling

US8645640B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Michael Stephen Floyd · Cedar Park, US
• Guy L. Guthrie · Austin, US
• Karthick Rajamani · Austin, US
• Gregory S. Still · Raleigh, US
• Jeffrey A. Stuecheli · Austin, US
• Malcolm S. Ware · Raleigh, US

Key dates

• Filing date: Jun 22, 2011
• Grant date: Feb 4, 2014
• Expiry date: Jul 9, 2032

Classification

• Technology area (CPC G): Physics
• CPC primary: G06Q50/10
• WIPO field: IT methods for management
• WIPO sector: Electrical engineering

Abstract

An apparatus for providing system memory usage throttling within a data processing system having multiple chiplets is disclosed. The apparatus includes a system memory, a memory access collection module, a memory credit accounting module and a memory throttle counter. The memory access collection module receives a first set of signals from a first cache memory within a chiplet and a second set of signals from a second cache memory within the chiplet. The memory credit accounting module tracks the usage of the system memory on a per user virtual partition basis according to the results of cache accesses extracted from the first and second set of signals from the first and second cache memories within the chiplet. The memory throttle counter for provides a throttle control signal to prevent any access to the system memory when the system memory usage has exceeded a predetermined value.