Wafer-scale package structures with integrated antennas
US8648454B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2012 |
| Grant date | Feb 11, 2014 |
| Priority date | — |
| Expiry date | May 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Wafer-scale packaging structures and methods are provided for integrally packaging antenna structures with semiconductor RFIC (radio frequency integrated circuit) chips to form compact integrated radio/wireless communications systems for millimeter wave (mmWave) and Terahertz (THz) applications. For example, a chip package includes an RFIC chip, an antenna structure and an interface layer. The RFIC chip includes a semiconductor substrate having an active surface and an inactive surface, and a BEOL (back end of line) structure formed on the active surface of the semiconductor substrate. The antenna structure includes an antenna substrate and a planar antenna radiator formed on a surface of the antenna substrate, wherein the antenna substrate is formed of a low loss semiconductor material. The interface layer connects the antenna structure to the BEOL structure of the RFIC chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.