Semiconductor device and method of manufacturing the same
US8652891B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2012 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Aug 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
The present invention discloses a semiconductor device, comprising a plurality of fins located on a substrate and extending along a first direction; a plurality of gate stack structures extending along a second direction and across each of the fins; a plurality of stress layers located in the fins on both sides of the gate stack structures and having a plurality of source and drain regions therein; a plurality of channel regions located between the plurality of source and drain regions along a first direction; characterized in that the plurality of gate stack structures enclose the plurality of channel regions. In accordance with the semiconductor device and the method of manufacturing the same of the present invention, an all-around nanowire metal multi-gate is formed in self-alignment by punching through and etching the fins at which the channel regions are located using a combination of the hard mask and the dummy gate, thus the device performance is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.