Active area bonding compatible high current structures
US8652960B2 · kind B2 · utility
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28References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 18, 2012 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Dec 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure comprises a top metal layer, a bond pad formed on the top metal layer, a conductor formed below the top metal layer, and an insulation layer separating the conductor from the top metal layer. The top metal layer includes a sub-layer of relatively stiff material compared to the remaining portion of the top metal layer. The sub-layer of relatively stiff material is configured to distribute stresses over the insulation layer to reduce cracking in the insulation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.