Patent · US Active

Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm

US8654970B2 · kind B2 · utility

21Cited by
27References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 31, 2009
Grant dateFeb 18, 2014
Priority date
Expiry dateNov 18, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L2209/24
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A processor including instruction support for implementing the Data Encryption Standard (DES) block cipher algorithm may issue, for execution, programmer-selectable instructions from a defined instruction set architecture (ISA). The processor may include a cryptographic unit that may receive instructions for execution. The instructions include one or more DES instructions defined within the ISA. In addition, the DES instructions may be executable by the cryptographic unit to implement portions of an DES cipher that is compliant with Federal Information Processing Standards Publication 46-3 (FIPS 46-3). In response to receiving a DES key expansion instruction defined within the ISA, the cryptographic unit may generate one or more expanded cipher keys of the DES cipher key schedule from an input key.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.