Christopher H. Olson
83Patents
21h-index
49Co-inventors
88Inventor score
Filing activity: Dec 16, 1991 → Feb 10, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5961636A | Checkpoint table for selective instruction flushing in a speculative execution unit | Physics | 67 | Expired |
| US7478225B1 | Apparatus and method to support pipelining of differing-latency instructions in a multithreaded processor | Physics | 65 | Expired |
| US7570760B1 | Apparatus and method for implementing a block cipher algorithm | Electricity | 54 | Active |
| US7620821B1 | Processor including general-purpose and cryptographic functionality in which cryptographic operations are visible to user-specified software | Physics | 54 | Active |
| US5826070A | Apparatus and method for maintaining status flags and condition codes using a renaming technique in an out of order floating point execution unit | Physics | 54 | Expired |
| US7795899B1 | Enabling on-chip features via efuses | Physics | 53 | Active |
| US6361645B1 | Method and device for compensating wafer bias in a plasma processing chamber | Electricity | 51 | Expired |
| US5392228A | Result normalizer and method of operation | Physics | 49 | Expired |
| US5822758A | Method and system for high performance dynamic and user programmable cache arbitration | Physics | 49 | Expired |
| US5634103A | Method and system for minimizing branch misprediction penalties within a processor | Physics | 43 | Expired |
| US5880983A | Floating point split multiply/add system which has infinite precision | Physics | 42 | Expired |
| US5241493A | Floating point arithmetic unit with size efficient pipelined multiply-add architecture | Physics | 41 | Expired |
| US7571284B1 | Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor | Physics | 38 | Expired |
| US6265831A | Plasma processing method and apparatus with control of rf bias | Electricity | 37 | Expired |
| US7684563B1 | Apparatus and method for implementing a unified hash algorithm pipeline | Electricity | 33 | Active |
| US8417961B2 | Apparatus and method for implementing instruction support for performing a cyclic redundancy check (CRC) | Electricity | 27 | Active |
| US5957997A | Efficient floating point normalization mechanism | Physics | 27 | Expired |
| US5794024A | Method and system for dynamically recovering a register-address-table upon occurrence of an interrupt or branch misprediction | Physics | 26 | Expired |
| US5758680A | Method and apparatus for pressure control in vacuum processors | Emerging Cross-Sectional Technologies | 25 | Expired |
| US5384723A | Method and apparatus for floating point normalization | Physics | 25 | Expired |
| US5553015A | Efficient floating point overflow and underflow detection system | Physics | 22 | Expired |
| US8654970B2 | Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm | Electricity | 21 | Active |
| US7353364B1 | Apparatus and method for sharing a functional unit execution resource among a plurality of functional units | Physics | 19 | Expired |
| US5790445A | Method and system for performing a high speed floating point add operation | Physics | 18 | Expired |
| US8671129B2 | System and method of bypassing unrounded results in a multiply-add pipeline unit | Physics | 18 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.