Erase and soft program within the erase operation for a high speed resistive switching memory operation with controlled erased states
US8659931B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 4, 2012 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Jul 17, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures and methods of operating a programmable impedance element are disclosed herein. In one embodiment, a method of operating a programmable impedance element can include: (i) determining an operation to be performed on the programmable impedance element, where the programmable impedance element includes a solid electrolyte between an active electrode and an inert electrode; (ii) in response to the determined operation being a program operation, programming the programmable impedance element by completing formation of a conductive path from a partial conductive path between the active and inert electrodes; and (iii) in response to the determined operation being an erase operation, erasing the programmable impedance element by substantially dissolving the conductive path, and then by forming the partial conductive path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.