Buffer management architecture
US8661223B1 · kind B1 · utility
2Cited by
12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 2012 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | May 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Packets are received via a plurality of ports, and packets are switched between the plurality of ports. Packets received via the plurality of ports are stored in a memory, and buffers are allocated in the memory for storing packets. An aging mechanism to indicate allocated buffers that are to be deallocated is implemented, and buffers that are indicated to be deallocated by the aging mechanism are deallocated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.