Patent · US Active

Non-volatile memory device formed by dual floating gate deposit

US8664059B2 · kind B2 · utility

1Cited by
5References
11Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 26, 2012
Grant dateMar 4, 2014
Priority date
Expiry dateJun 6, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/035

Abstract

A method includes forming a shallow trench isolation (STI) region in a substrate; depositing a first material such that the first material overlaps the STI region and a portion of a top surface of the STI region is exposed; etching a recess in the STI region by a first etch, the recess having a bottom and sides; depositing a second material over the first material and on the sides and bottom of the recess in the STI region; and etching the first and second material by a second etch to form a floating gate of the device, wherein the floating gate extends into the recess.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.